1. Technical Field
The disclosed embodiments relate in general to an electrostatic discharge (ESD) protection apparatus, and more particularly to an ESD protection apparatus and method therefor for between rail lines.
2. Description of the Related Art
As CMOS fabrication techniques approach a nanometer scale, a breakdown voltage of a gate oxide layer having an ever-decreasing thickness rapidly also drops along with the advancement in the fabrication techniques. However, the substantial decrease in the breakdown voltage adds complications to designs of an electrostatic discharge (ESD) protection circuit. To achieve whole-chip ESD protection, a power-rail ESD clamp circuit inevitably plays a crucial role.
A conventional power-rail ESD clamp circuit, including a detection circuit therefor, is realized by an RC circuit consisted of a capacitor and a resistor. ESD is performed by controlling a conduction period of a clamp device via a size of a time constant. Thus, in the above conventional detection circuit, it is necessary that the time constant be particularly controlled with care to distinguish between an ESD event from a power-on event. The length of the conduction period of the clamp device during an ESD event is determined by the RC time constant of the previous-stage detection circuit. A time constant that is too small renders an insufficient conduction period and reduces the ESD protection capability; whereas a time constant that is too large much likely leads to a mistrigger and conduction of the ESD protection circuit under a power-on condition.
As previously stated, the conduction period of the clamp device is dependent on the RC time constant. Assume the above detection circuit is utilized for controlling a protection circuit that generates a low-impedance conduction resistance through controlling a MOSFET device channel. Since the MOSFET device channel requires a rather long conduction period to release an ESD current, the issue of a mistrigger and conduction is also much likely caused. Meanwhile, the conventional detection circuit structure occupies a large layout area due to the capacitor and resistor adopted.